B.TECH - Semester 4 analog integrated circuits Question Paper 2022 (dec)
Practice authentic previous year university questions for better exam preparation.
Sample Questions
- Delermine the oulpul vallage $V_{s}$ to the circuil given below.
- Why inlegralors are preferred over differentialors in analog computers?
- What are the assumptions made from ldeal opamp characterislics?
- Write standard equation in frequency domain for a second order high pas sallen-key filler.
- Derine notch filler.
- State the fealures of dual slope ADC.
- List oul frequency domain persormance os DAC. © List oul Gilberl multiplier cell applications. 9 What is a precision rectilier? Why is it called so?
- Define the caplure range and pull in lime associaled wilh a PLL. ( $10 \times 2=20$ Marks) Answer any one question from each module.
- (a) Derive the conditions for DC characteristics of an operational amplifier. 10
- (b) Derive expression for output voltage of an anlilog amplifier. Explain how you provide temperalure compensalion in the circuit. 10 12 (a) Define slew rale and describe a method lo improve slew rale. 10
- (b) Design an Opamp circuil lo give an oulpul voliage $V_{0}=3 V_{1}-2 V_{2}-5 V_{3}$. where $V_{1}, V_{2}$ and $V_{3}$ are inpuls. 10 13 (9) Design and draw the Band pass filter using Opamp to have frequency $\mathrm{I}_{\mathrm{I}}=1 \mathrm{KHz}$...
- (b) Draw the circuil of aslable mullivibralor using Op.amp and derive the expressions for ils requency of oscillations. 10
- (a) A lirst order LPF (butterwarth) has a cul off frequency of $\mathrm{B} \mathrm{KI}-\mathrm{Iz}$ and unily gain al low frequency. Find the transfer function magnitude in dB at 14 KHz for the filler. 10
- (b) Design a monoslable mulluibrator for 0,5S putse width. 10
- (a) A dual slope ADC uses a 16 bit counter and a 4 MHz clock rate. The maximum inpul vollage is +10 V . The max inlegrator oulpul voltage should be - 8 V when counter has recycled through $2^{\prime} n$ ' counls. The capacitor used in the integrator ...
- (b) Explain the operation of swilched capacilar integrator with neat diagrams 10
- (a) Explain the R-2R ladder type DAC in voltage mode and current mode. 12
- (b) Discuss the operalion of sample and hold circuil with neal diagram. $\mathbf{8}$